High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories

We report for the first time on a thermally stable High-k/Metal Gate (HKMG) low cost CMOS FinFET solution for DRAM peripheral applications, integrated with Si:P and Si 0.55 Ge 0.45 :B embedded Source/Drain (S/D). The baseline is fully compatible with DRAM peripheral constraints (e.g. higher thermal budget linked to the co-integration with the DRAM cells), and exhibits improved I ON (I OFF ) and short channel control performance over Planar HKMG. Finally, a gate stack solution for V TH tuning (Diffusion and Gate Replacement, D&GR) compatible with DRAM thermal budget and FinFET flow is demonstrated, with no degradation of EOT/Gate leakage/BTI and proven functionality of SRAM.