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Evaluation of Alternative Materials for System-on-Package (SOP) Substrates

材料科学 复合材料 热膨胀 倒装芯片 热冲击 复合数 环氧树脂 电子包装 陶瓷 胶粘剂 图层(电子)
作者
K. Shinotani,P. Markondeya Raj,Myungduk Seo,Shubhra Bansal,Hiromu Sakurai,Swapan K. Bhattacharya,Rao Tummala
出处
期刊:IEEE Transactions on Components and Packaging Technologies [Institute of Electrical and Electronics Engineers]
卷期号:27 (4): 694-701 被引量:5
标识
DOI:10.1109/tcapt.2004.838906
摘要

This work deals with the selection and evaluation of new board materials that can enable microminiaturized, multilayered multifunctional system-level packaging such as system-on-package (SOP) pursued by the Packaging Research Center, Georgia Institute of Technology. The effect of board properties such as coefficient of thermal expansion (CTE) and high elastic modulus upon the increase in flip chip reliability performance was investigated and guidelines for optimum board properties for realizing SOP were suggested based on the reliability results. Three different types of carbon fiber reinforced composites boards and two different kinds of inorganic boards were tested to evaluate the improvement in flip chip reliability compared to conventional glass fabric-epoxy boards (FR-4). Short carbon fiber, unidirectional carbon fiber, and carbon fiber-cloth reinforced polymer composites with a CTE close to 3 ppm//spl deg/C and three to nine times higher modulus than conventional FR-4 were selected as polymer-based composite boards. Metal matrix composites with moderate CTE ( Al/SiC; 8 ppm//spl deg/C) and ceramics with lower CTE (AlN, 4 ppm//spl deg/C) were selected as inorganic boards with high stiffness. The thermomechanical reliability of the electrical interconnections was evaluated with flip-chips assembled on five different boards by subjecting them to thermal shock treatments. Except AlN, all test vehicles fabricated with low CTE boards did not show any improvement in reliability even with underfill though they have matched CTE with Si. This is attributed to the higher dielectric stresses caused by the increased CTE mismatch between the boards and the build-up dielectric. The stress in dielectric leads to severe cyclic warpage of boards during heat cycle, resulting in dielectric fatigue cracking. With this mechanism, even underfill cannot improve the reliability. On the contrary, AlN board with highest modulus and matched CTE with Si significantly enhanced the reliability even without underfill because of its high modulus preventing cyclic warpage during thermal cycling. A new type of failure mechanism was proposed based on the optical microscopic failure mode analysis as well as analytical modeling of stress induced in the solder joints and dielectric layer. In-situ warpage of test vehicles during thermal cycling was measured in order to confirm the proposed failure mechanism. It can be concluded that to enhance the flip chip reliability without underfill, it is necessary to have high elastic modulus along with Si-matched CTE. Ultra-high stiffness is an important requirement for developing new board materials that can realize SOP concept.

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