Leading edge die stacking and wire bonding technologies for advanced 3D memory packages

Vertical stacking of thin die in memory packages as tall as 16 layers and 32 layers is common in high volume production. 3D NAND flash memory makers are also announcing and realizing their production ramps for 64 layers. 3D die stacking enables device integration flexibility and enhancements in electrical performance. Thinner package requirements drive die thicknesses to below 25um. Assembly equipment manufacturers utilize state of the art thin wafer technologies in areas of wafer backgrinding, dicing, wafer handling, thin die attach and stacking, wire bonding on thin overhang die, and wire looping motions for ultra low loops. Material suppliers are developing materials to accompany these latest equipment advancements. Low adhesion wafer tape to ease thin die picking, thin Die Attach Film (DAF) going below 10um thickness, and ultra fine bonding wire at 0.6mil and less, are some of the examples. In this paper, we will focus on two areas: 1) thin die attachment up to 16 layers with die thicknesses of 15um and 25um, and DAF thicknesses of 5um and 10um, and 2) wire bonding on thin and overhanging die stacks. Finite element modelling indicating stress distribution on the die during thin die picking in die attach and overhang wire bonding, will be discussed and used as the basis of developing solutions to overcome die cracks and inconsistent bond qualities. These solutions include thin die tooling designs, pick processes for die attach, wire bonding processes on thin die with long overhang distance, and ultra low loop processes involving long inboard wire length and high die stack height.