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Carrier transport through the ultrathin silicon-oxide layer in tunnel oxide passivated contact (TOPCon) c-Si solar cells

欧姆接触 钝化 量子隧道 材料科学 氧化物 太阳能电池 接触电阻 光电子学 图层(电子) 纳米技术 冶金
作者
Zhi Zhang,Yuheng Zeng,Chun‐Sheng Jiang,Yuqing Huang,Mingdun Liao,Hui Tong,Mowafak Al‐Jassim,Pingqi Gao,Chunhui Shou,Xiaoling Zhou,Baojie Yan,Jichun Ye
出处
期刊:Solar Energy Materials and Solar Cells [Elsevier BV]
卷期号:187: 113-122 被引量:99
标识
DOI:10.1016/j.solmat.2018.07.025
摘要

The carrier transport through the silicon-oxide (SiOx) layer in tunnel oxide passivated contact (TOPCon) c-Si solar cells has been studied experimentally and by simulation. The current intensity versus voltage (J-V) characteristics of GaIn/n-c-Si/SiOx/n+-poly-Si/Al structures shows a linear Ohmic characteristic, while a non-Ohmic behavior is observed in the samples without the n+-poly-Si contact layer. Conductive Atomic Force Microscopy (c-AFM) images reveal some current spikes on the surface of the samples, which could be related to the transport through pinholes. The simulation results show that 1) a rectification characteristic is obtained when only the tunneling mechanism is included, 2) both the reverse saturation current and the forward current increase when a small amount of transport through pinholes is introduced, and 3) finally a linear Ohmic behavior is observed when the pinhole transport component reaches a certain level. Furthermore, the simulation for whole TOPCon solar cells provides some useful results. For very thin SiOx (< 1.2 nm), the tunneling provides sufficient high tunneling probability and high efficiency TOPCon solar cells can be obtained without transport through pinholes if the passivation is ensured; while for a relatively thick SiOx (> 1.2 nm) without the transport through pinholes, the TOPCon solar cell shows a poor fill factor (FF) with a high series resistance (Rs) because the tunneling does not provide a sufficient high transport channel for carrier transport, and the introduction of a small number of transports through pinholes improves the FF and reduces the Rs, hence improves the PCE. However, a high possibility for carrier going through pinholes reduces all of the performance parameters and degrades PCE for all the cases simulated. Therefore, an optimized pinhole density and size distribution is critical engineering for solar cell performance optimization. However, the establishment of an optimized method to precisely control the pinhole formation and characterization is still on the way.
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