A 16 nm FinFET circuit with triple function as digital multiplexer, active-high and active-low output decoder for high-performance SRAM architecture

Abstract This paper presents a fin field-effect transistor (FinFET)-based single circuit (FSC) used to realize an active-high output decoder (AHD), active-low output decoder (ALD) and digital multiplexer. Traversal of the input signal through a single transmission gate irrespective of the size of the FSC is unique to this proposed multiplexer. This new FSC architecture uses an equal number of n-FinFET and p-FinFET devices, requiring few transistors compared with complementary metal oxide semiconductor designs. Three novel circuits are created using various logic styles following the same architecture. This FSC is compared with these similar circuits and, on average, the results for power dissipation and delay in the worst case show that this FSC is better by 14% and 18%, respectively. A FSC is created and extensively simulated with 16 nm FinFET technology using Eldo software. All the circuits are designed for 0.75 V, 1 V and 1.25 V and are stimulated with multiple input frequencies. The proposed circuit is most suitable for row address decoders and column multiplexers of static random access memories.