A Charge Pump for Sub-Sampling Phase-Locked Loops with Virtual Reference Frequency Doubling

In this paper, a novel charge pump for sub-sampling phase-locked loops (SSPLLs) is presented. Contrary to the conventional charge pump, the proposed implementation eliminates the previously-required pulser. This is achieved by using all sample data from the ping-pong sub-sampling phase detector as opposed to only every second point, which enables the charge pump to run pseudo-continuous. This virtually raises the reference frequency by a factor of two, which is beneficial for the phase noise performance of the phase-locked loop while fulfilling the requirements for bandwidth of reference buffers, switches etc. Furthermore, eliminating the pulser enables a highly power-efficient charge pump design, leveraging higher SSPLL FoM. The proposed charge pump is implemented in a 22-nm fully-depleted silicon-on-insulator technology. The power and area consumption are reduced by roughly 80% and 55%, with similar effective gain, noise and offset performance to the conventional design.