中间层
互连
现场可编程门阵列
嵌入式系统
带宽(计算)
计算机科学
模具(集成电路)
收发机
工程类
电子工程
电气工程
材料科学
电信
CMOS芯片
操作系统
蚀刻(微加工)
图层(电子)
复合材料
作者
Ravi Mahajan,Zhiguo Qian,Ram Viswanath,Sriram Srinivasan,Kemal Aygün,Wei-Lun Jen,Sujit Sharan,Ashish Dhall
出处
期刊:IEEE Transactions on Components, Packaging and Manufacturing Technology
[Institute of Electrical and Electronics Engineers]
日期:2019-09-24
卷期号:9 (10): 1952-1962
被引量:85
标识
DOI:10.1109/tcpmt.2019.2942708
摘要
This article provides an overview of the embedded multidie interconnect bridge (EMIB) multichip packaging (MCP) technology. EMIB is a unique packaging paradigm that provides very high-density interconnects (currently in the range of 500-1000 I/O/mm) localized in between two devices, thus enabling high-bandwidth (BW) on-package links while leaving the rest of the package structures and designs unaffected. The construction of the silicon bridge and the package to allow high BW electrical signaling between two dies is discussed in detail. Examples of the EMIB implementations for the links between the field-programmable gate array (FPGA) logic and high bandwidth memory generation 2 (HBM2) memory stacks, graphics die and HBM2 memory stacks, FPGA logic die, and high-performance transceiver die are described. EMIB packaging is compared with similar high-density interconnect technologies such as silicon interposer with through-silicon vias (TSVs) and other fan-outbased package technologies. Design optimization strategies for power delivery and I/O routing in the presence of an embedded bridge are highlighted.
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