Fast LDO Handles a Wide Range of Load Currents and Load Capacitors, up to 100 mA and Over 1μF

This paper proposes a low dropout voltage regulator (LDO) that exhibits both a fast response to load transients and the ability to handle practically any load capacitor. Starting from a typical LDO topology, an error amplifier (EA) that drives a PMOS pass transistor and a passive feedback network, we inserted a novel circuit, with the input AC-coupled to the LDO output and the output connected directly to the pass transistor gate. This circuit creates an inner feedback loop able to react quicker than the main feedback loop to variations in the output voltage, and appropriately inject or sink current to/from the gate node. Moreover, the inner feedback loop helps reduce the equivalent small-signal impedance at the LDO output, which in turn reduces the impact the pole associated with the output node has on the LDO stability. A compact circuit implementation of this topology is presented in this paper: it combines the proposed fast transient & frequency compensation circuit with a high slew-rate EA. The resulting LDO was integrated in a 130 nm standard CMOS technology. The measurement results are in good agreement with simulations and validate the concept and design. The LDO provides a steady 1 V output with the supply voltage varying from 1.2 V to 1.5 V and the load current going up to 100 mA. Its fast response to load transients helps maintain the output voltage overshoot and undershoot below 250 mV for CL= 0 and under 60 mV for$\text{C}_{\mathrm {L}} =1\,\,\mu \text{F}$, when the load current varies between 1$\mu \text{A}$and 100 mA in 1$\mu \text{s}$. The LDO requires only 6.2$\mu \text{A}$of quiescent current and occupies 0.018 mm2of die area.