有限元法
功率(物理)
电子工程
联轴节(管道)
碳化硅
电源模块
寄生提取
电流(流体)
计算机科学
工程类
电气工程
机械工程
材料科学
物理
结构工程
量子力学
冶金
作者
Yuxin Ge,Xiaojie Shi,Yongqing Yang,Qian Cheng,Guoqing Xin
出处
期刊:IEEE Transactions on Power Electronics
[Institute of Electrical and Electronics Engineers]
日期:2023-02-01
卷期号:38 (2): 2240-2251
标识
DOI:10.1109/tpel.2022.3207821
摘要
Multichip silicon carbide (SiC) power modules with Kelvin-source connections are commonly used in applications requiring large capacity. As a result of the parasitic effect induced by the interconnections in module packaging, the dynamic current mismatch among paralleled dies limits the available capacity of power modules. This article presents a general analysis on the mechanism of layout-dominated dynamic current balancing in multichip SiC power modules, utilizing a coupled parasitic network model. Focusing on the interrelation of parasitic parameters in the power module, a coupled parasitic network model is developed specially for switching transients, and the dynamic current balancing equations are derived. For the multichip power modules with two different layouts, the parasitic parameters pertaining to the proposed model are extracted by the finite-element analysis (FEA). The acquired parasitic parameters considering magnetic coupling are utilized to calculate and verify the dynamic current balancing equations. Moreover, based on these parasitic parameters, the electromagnetic coupling simulation is performed to evaluate the dynamic current sharing. Furthermore, for the validation of the proposed model and equations, experiments are conducted with the fabricated power module prototypes.
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