CMOS芯片
电容
材料科学
光电子学
电气工程
计算机科学
物理
工程类
量子力学
电极
作者
K. Okamoto,Takahisa Tanaka,Miharu Miyamura,Hiroki Ishikuro,Ken Uchida,Toshitsugu Sakamoto,Munehiro Tada
标识
DOI:10.1109/iitc52079.2022.9881293
摘要
Cryo-CMOS circuit performance at 4K including both BEOL and FEOL characteristics has been investigated in a 65nm bulk CMOS for the first time. ON-current (I on ) of n/pMOSFET are improved +25%/+9% with excellent gate modulation (I on /I off =~10 9 ). Cu line/via resistances decrease with temperature due to reduction of phonon scattering, and −75%/−20% lower resistances are obtained at 4K. It is revealed that there is no inter-line capacitance change and no severe Joule heating effect (JHE) of Cu BEOL at 4K. The newly developed 4K-SPICE model including BEOL characteristics enables accurate CMOS circuit design at 4K, giving 5 ~ 40% faster operation of RC line with clear dependence on driver-size and interconnect-load.
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