Prototype of a Readout Control ASIC for Data Collection and Command Distribution

The inner tracker (ITK) is the closest detector to the beam pipe at the super tau-charm facility (STCF), which is composed of three layers of silicon pixel detector. ITK is expected to be constructed using STCFpix application-specific integrated circuits (ASICs), a monolithic CMOS pixel sensor under research and development. In this work, an STCF read-out controller (STCF_ROC) is proposed, which is a configurable ASIC that acts as an assembler, buffer, filter, aggregator, and real-time data packet processor for the pixel detectors. The STCF_ROC allows a flexible mapping configuration between input and output channels according to the effective data rate of different detector layers, which essentially optimizes bandwidth utilization and reduces the number of required data links. Another important function of STCF_ROC is to distribute the control commands, clock, and trigger signals to the STCFpix. The STCF_ROC ASIC has been implemented in a commercial 130 nm CMOS technology. Specifically, this article presents the architecture, design, and implementation of STCF_ROC, as well as a complete verification platform for verifying the basic functions of STCF_ROC. The test system is designed based on the field programmable gate array (FPGA) evaluation board, where the test results validate all the designed functionalities of STCF_ROC. Meanwhile, the power consumption is only 0.702 W.