加密
计算机科学
精简计算指令集
嵌入式系统
现场可编程门阵列
Verilog公司
专用集成电路
高级加密标准
计算机硬件
指令集
操作系统
作者
Shuai Yang,Li Shao,Jing-Reng Huang,Wanghui Zou
出处
期刊:Electronics
[MDPI AG]
日期:2023-10-12
卷期号:12 (20): 4222-4222
被引量:1
标识
DOI:10.3390/electronics12204222
摘要
The security and reliability of data transmission between IoT devices are considered to be major challenges in the development of IoT technology. This paper presents a low-power, low-cost RISC-V processor for IoT applications with an integrated hybrid encryption accelerator, which can achieve efficient and secure encryption and decryption of data transmitted between IoT devices. The hybrid encryption accelerator, which uses the SM3 and the SM4, respectively, as hash and symmetric encryption algorithms, achieves a balance between encryption security, high speed, and key-management convenience. Both the processor and encryption accelerator are designed using the Verilog HDL language and are subsequently implemented and evaluated on both FPGA and ASIC platforms. The performance of the proposed processor and that of the Hummingbird E203 and the XuanTie E902 are compared. It is shown that, on the FPGA platform, the total resource utilization rate is reduced by 39.1~66.2%. In a 90 nm CMOS process, it is shown that the power efficiency of the proposed processor is increased by 10~34.8% and the circuit area is reduced by 32.5~57.1%.
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