A 1.58 nJ/conversion temperature-to-digital converter with low power variations

Abstract A 1.58 nJ/conversion temperature-to-digital converter at the supply voltage of 0.7 V was designed and fabricated on the die area of 0.147 mm 2 using the 90 nm CMOS technology. The sub-nA constant reference current ( I ref ) and the sub-nA complementary-to-absolute temperature (CTAT) current ( I CTAT ) are generated by employing the gate leakage currents of PMOSFETs. The current-to-frequency oscillators using those currents followed by the frequency-to-digital converter are used to produce the digital codes inversely proportional to temperatures. With this approach, the power consumption at high temperatures can be alleviated significantly. Thus, the variation of power consumption is only 70% from −10 °C to 90 °C. The conversion time is 107 ms at the RT and the noise non-limited resolution is 0.052 °C.