三角积分调变
过采样
计算机科学
量化(信号处理)
人工智能
算法
电信
带宽(计算)
作者
Zilong Shen,Jiaiun Tang,Haoyang Luo,Zhongyi Wu,Zongnan Wang,Xing Zhang,Xiyuan Tang,Yuan Wang
标识
DOI:10.1109/cicc60959.2024.10529047
摘要
High-resolution, low-latency, and low-power capacitance-to-digital converters (CDCs) have drawn increasing attention due to their extensive usage in emerging loT applications, such as electronic capacitance tomography and robotics. Several architectures have been explored. The SAR-based CDC realizes high energy efficiency, but its resolution is usually limited [1]. $\Delta\Sigma$ modulators suit well for high-resolution applications thanks to the quantization noise shaping. However, $\text{DT}-\Delta\Sigma \text{Ms}$ still suffer from sampling kT/C noise [2]. $CT-\Delta\Sigma \text{Ms}$ achieve high resolution with the mitigation of sampling operation and sufficient OSR [3], [4]. However, they cannot support single-shot measurement and usually suffer from ELD issues, leading to high measurement latency and stability concerns. Recently, the time-domain (TD) quantization architectures become popular for their high energy efficiency [5], [6]. The $\text{SAR}-\text{TD}\Delta\Sigma \mathrm{M}$ combines the efficient SAR quantization with the accurate zoomed time-domain operation, offering state-of-the-art energy efficiency. Yet, further performance improvement is limited by the sampling noise and the 1 st-order noise shaping.
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