锁相环
材料科学
光电子学
物理
电压
充电泵
抖动
CMOS芯片
计算机科学
作者
Zhu Shi,Yanpeng Zhao,Bo Yang,Fei Yin,Bin Wang,Wenping Liu
出处
期刊:IEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference
日期:2021-06-18
卷期号:4: 243-247
标识
DOI:10.1109/imcec51613.2021.9482000
摘要
A highly current matched charge pump (CP) is proposed to improve the precision of the output clock for a delay-locked loop (DLL). The presented CP based on source-switched structure achieves good matching of charging and discharging currents over a broad dynamic range by introducing a novel rail-to-rail operational amplifier. The stable output voltage of the modified charge pump dramatically reduces the jitter of all output clocks in the locking state. Simulation results at a 1.2V supply voltage and a 40 nm COMS technology demonstrate the maximum mismatching ratio of charging and discharging currents decreases from 26.3% to 5.4% over the operating range of 0.2~1V. Furthermore, compared with the conventional charge pump, the maximum reduction magnitude of jitter for the related output clock is as much as 74.3% at the reference input clock of 1GHz.
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