石墨烯
材料科学
晶体管
光电子学
硅
纳米线
纳米技术
GSM演进的增强数据速率
栅极电介质
带隙
场效应晶体管
计算机科学
电气工程
电压
电信
工程类
作者
He Tian,Yang Shen,Zhaoyi Yan,Yanming Liu,Fan Wu,Tian‐Ling Ren
标识
DOI:10.1016/j.mee.2023.111963
摘要
There is a great attention of scaling down transistor based on 2D materials. Although gate-all-around (GAA) structure based on silicon has been simulated, the GAA structure combined with 2D materials do not have a well understanding. Moreover, the recent proposed edge graphene gated transistor also needs deeper analysis. Here, edge graphene gated 2D-FETs are further investigated and optimized by employing semi-classical numerical method. The physical dimensions can be optimized to obtain performance improvement, and some possible schemes are proposed. We demonstrate fair quantitative comparison for our proposed 0.34 nm graphene edge gated MoS2 and GAA graphene gated silicon nanowire device structure. It is found that the edge graphene gated MoS2 FET can achieve superior short channel performance compared to GAA graphene gated silicon nanowire and traditional GAA silicon nanowire FET, due to the generic nature of 2D TMDs, which possess direct narrow bandgap, low dielectric constant and atomic thickness. We have figured out that the 0.34 nm edge graphene gated MoS2 FET has even better subthreshold swing than the Si-GAA and Graphene-GAA, which shows promising prospect as next generation electronics.
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