解耦(概率)
晶体管
通流晶体管逻辑
分频器
肖特基二极管
电气工程
发射极耦合逻辑
传播延迟
环形振荡器
消散
光电子学
逻辑电平
电子工程
逻辑门
计算机科学
材料科学
物理
二极管
工程类
CMOS芯片
电压
控制工程
热力学
作者
Jun‐ichi Nishizawa,T. Nonaka,Y. Mochida
标识
DOI:10.7567/jjaps.19s1.279
摘要
The static induction transistor logic (SITL) equivalent to PL is evaluated by fabricating type D-F/F frequency divider and 14 bit BCD programmable counter to prove its potentiality in VLSI. SITI 2 L is also implemented into LSI. The normally-configured SIT is introduced to serve as a driver transistor in the SITL having new circuit configuration in order to improve the speed performance, where output Schottky diodes are fabricated to ensure the decoupling between outputs. The performance of this Schottky SITL is evaluated in the ring oscillator, where the propagation delay is obtained 2.5 nsec at a power dissipation of 100 µW.
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