覆盖
光刻
先进过程控制
平版印刷术
计量学
半导体器件制造
计算机科学
吞吐量
过程控制
过程(计算)
可靠性工程
还原(数学)
薄脆饼
工程类
纳米技术
材料科学
数学
电气工程
操作系统
统计
电信
程序设计语言
光电子学
几何学
无线
作者
Huidong Zhang,Tianheng Feng,Dragan Djurdjanović
标识
DOI:10.1109/tsm.2022.3143039
摘要
Control of overlay errors in lithography process in semiconductor manufacturing uses in-process measurements of overlay errors from markers distributed across a wafer to adapt controllable process parameters on the relevant lithography tools in order to minimize future errors. Intuitively speaking, the use of a larger number of measurement markers should lead to improvements in one’s ability to control the overlay errors. However, those gains come with simultaneous increases in the metrology times, which negatively impacts throughput. Therefore, one should carefully and strategically select markers which most efficiently enable suppression of overlay errors. This paper proposes a novel optimization framework that couples a recently introduced approach for robust control of overlay errors in photolithography processes with a strategic selection of overlay measurement markers to enable improved control of overlay errors using a reduced number of measurements. Application of the newly proposed method to the data and models from an industrial-scale semiconductor lithography process shows that the newly proposed combination of the robust overlay control paradigm and optimized marker selection enables improved overlay control, even with a significantly reduced number of markers. Thus, the new methodology enables reduction of measurement times and subsequent overall cycle times, without deteriorating the outgoing product quality.
科研通智能强力驱动
Strongly Powered by AbleSci AI