| 标题 |
SystemVerilog-Based Modeling and Verification of 40-Gb/s/Lane PAM-3 Transmitter for USB4.0 Gen4 基于SystemVerilog的USB4.0 Gen4 40-Gb/s/通道PAM-3发射机建模与验证
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| 其它 |
期刊:2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD) 作者:Yong-Gyu Yu; Ju-Hyeong Yun; Chae-Hyeon Lim; Joo-Hyung Chae 出版日期:2025 |
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