Analysis and Design of High-Speed and Low-Distortion Bootstrapped Switches

Bootstrapped switches are widely applied in a variety of applications requiring high-speed and high-linearity sampling. However, the parasitic effects of switches causing distortions have not been thoroughly analysed before. In this paper three fundamental non-ideal factors have been explored, which are source-drain exchange, parasitic capacitive division and charge redistribution, and their impact has been mathematically derived respectively. It is found that both on-resistance and the bootstrapped capacitor have a quadratic (40 dB/dec) impact on the third harmonic distortion of sampled signals. Afterward, a design guideline is proposed and verified by a 2-MSPS-&-90dB-THD design case. Comprehensive simulation with various design parameters shows that our design flow could feasibly optimise the design cost without sacrificing performance and hence being constructive for designers of bootstrapped switches.