An Optimized Viterbi Decoder Architecture Using the Precomputed Table Approach for Branch Metric Unit

This paper features a power-efficient Viterbi decoder targeted for energy-efficient digital communication systems such as mobile and edge applications. An attempt has been made at a power-efficient Viterbi decoder by adopting the precomputed table approach for branch metric unit (BMU) in the modified Viterbi decoder, both of which are reported independently in the literature. The modified Viterbi decoder reported in the literature, has a reconfigured Hamming distance module and a reconfigurable processing element (RPE) along with a feedback circuitry in the back-trace module, and has proved to achieve low power consumption. The reported precomputed table approach reduces the hardware complexity. By adopting the precomputed table approach in the modified decoder, the bitwise XOR-based Hamming distance computations are circumvented, that results in a power optimization of up to 39.05% when compared with the modified Viterbi decoder. Such power-optimized Viterbi decoders make real-time communication systems more power-efficient, thereby being appropriate for use in systems where low power consumption is of paramount importance.