Design of Memristor-based XOR Logic Gate and Half Adder

Abstract The non-volatile logic unit based on memristor can build a computing architecture which integrates processor and memory. A novel XOR logic gate as well as half adder with four memristors, one NMOS and one power excitation is proposed in this study. The constraints on the NMOS and power excitation are also presented. The effectiveness of the XOR logic gate proposed is confirmed by the simulation results of LTSPICE. Compared with several prior schemes, the design has better performance in terms of power consumption, operation steps and architecture complexity.