Strained Silicon-on-Insulator Platform for Co-Integration of Logic and RF—Part II: Comb-Like Device Architecture

In the first part of this two-part article, implant-induced strain relaxation has been successfully demonstrated on a common strained silicon-on-insulator (SSOI) platform. In this second part, based on an SSOI platform that could enable the cointegration of highly tensile-strained Si n-channel field-effect transistors (nFETs) and compressive-strained SiGe p-channel FETs (pFETs) on the same substrate for both logic and 5G RF circuits, we here propose a comb-like device structure within the strained SOI platform for further improvement in the electrostatic, dc, and RF performances over the unstrained SOI FinFETs counterpart. It is demonstrated that the peak ${G}_{\text {m}}$ of strained comb-like Si nFETs can be improved by 35% over unstrained n-type FinFETs SOI. The improvements of ${f}_{\text {T}}$ by 22% and ${f}_{\text {max}}$ by 36% over no-comb devices are also observed. Furthermore, the linearity of ${f}_{\text {T}}$ and ${f}_{\text {max}}$ has been greatly improved by introducing forward body biasing on the comb-like device structure.