计算机科学
横杆开关
磁阻随机存取存储器
稳健性(进化)
人工神经网络
二进制数
工艺变化
吞吐量
正规化(语言学)
词(群论)
并行计算
算法
计算机硬件
算术
人工智能
过程(计算)
数学
随机存取存储器
电信
基因
操作系统
生物化学
化学
无线
几何学
作者
Daehyun Ahn,Hyun Ju Oh,Hyungjun Kim,Yulhwa Kim,Jae-Joon Kim
出处
期刊:IEEE Access
[Institute of Electrical and Electronics Engineers]
日期:2021-01-01
被引量:1
标识
DOI:10.1109/access.2021.3121011
摘要
Magnetic RAM (MRAM)-based crossbar array has a great potential as a platform for in-memory binary neural network (BNN) computing. However, the number of word-lines that can be activated simultaneously is limited because of the low $I_{H}/I_{L}$ ratio of MRAM, which makes BNNs more vulnerable to the device variation. To address this issue, we propose an algorithm/hardware co-design methodology. First, we choose a promising memristor crossbar array (MCA) structure based on the sensitivity analysis to process variations. Since the selected MCA structure becomes more tolerant to the device variation when the number of 1 in input activation values decreases, we apply an input distribution regularization scheme to reduce the number of 1 in input of BNNs during training. We further improve the robustness against device variation by adopting the retraining scheme based on knowledge distillation. Experimental results show that the proposed method makes BNNs more tolerant to MRAM variation and increases the number of parallel word-line activation significantly; thereby achieving improved throughput and energy efficiency.
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