Research Progress of Electroless Plating Technology in Chip Manufacturing

As an indispensable part of today's society, the research on the manufacturing and packaging process of chips is particularly important.In the conventional chip manufacturing and packaging process, physical vapor deposition, chemical vapor deposition, electroplating, hot pressing and other processes are widely used.These processes are not only complicated and expensive, but also have some disadvantages that hinder the development of chip technology.The electroless deposition process has the advantages of mild conditions, low equipment cost, simple steps, and strong conformal ability.Researchers have paid attention to and studied its application in the field of chip manufacturing and packaging.Firstly, the principle and types of chip electroless deposition, activation, pre-grafting treatment methods and key materials were introduced in this paper.Secondly, to illustrate the advantages of electroless deposition in chip manufacturing, the main process of conductive interconnection in chip manufacturing were introduced, the conventional manufacturing process and electroless deposition manufacturing process in the interconnection process in chip, 3D packaging through silicon via (TSV) process, redistribution layer, bump, and bonding process were compared.Thirdly, the research progress of electroless deposition using in in-chip including barrier layer, seed layer, gap filling, substrate, bump is summarized and discussed; the composition and function of the plating solution, mechanism of additives in super electroless deposition gap filling are also discussed.Finally, the future application of electroless plating technology in the new generation of chip manufacturing is prospected.