控制理论(社会学)
电压调节器
瞬态(计算机编程)
计算机科学
电压
锁相环
延迟锁定回路
低压差调节器
瞬态响应
电子工程
跌落电压
工程类
抖动
控制(管理)
电气工程
人工智能
操作系统
作者
Xichen Duan,Yuzi Wang,Liuyang Zhang,Jianing Liang
标识
DOI:10.1109/icsict55466.2022.9963148
摘要
This paper describes a digital LDO (DLDO) regulator that does not require any external clock but uses an adaptive frequency clock generated by itself, with variable sampling from voltage-controlled oscillators (VCOs) and D flip-flops frequency. This work adopts a dual-loop control scheme, with two voltage regulation modes, coarse adjustment, and fine adjustment. It can improve the transient response of DLDO, reduce the overall power consumption of the system, and have excellent stability.
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