A Fully Integrated Fast Transient Dual-Loop Digital LDO Based on Adaptive Clock Frequency for Voltage Regulation Applications

This paper describes a digital LDO (DLDO) regulator that does not require any external clock but uses an adaptive frequency clock generated by itself, with variable sampling from voltage-controlled oscillators (VCOs) and D flip-flops frequency. This work adopts a dual-loop control scheme, with two voltage regulation modes, coarse adjustment, and fine adjustment. It can improve the transient response of DLDO, reduce the overall power consumption of the system, and have excellent stability.