Artificial Neural Networks for Power Match Modeling and Verification With a Novel D-Band Vector Load—Pull Bench

We present an artificial neural network (ANN) model that predicts high-frequency, large-signal hetero-junction bipolar transistor (HBT) performance as a function of the load reflection coefficient and input power trained on a set of load—pull (LP) data that include delivered source power, output power, power-added efficiency (PAE), gain compression, input voltage, and output current. The ANN models are trained with data measured using a novel $D$ -band vector LP test bench at 130, 135, and 140 GHz. We analyze common-base (CB) and common-emitter (CE) indium phosphide (InP) HBTs and show that the CE HBT provides the highest impedance margin that maximizes PAE across a 10% bandwidth centered at 140 GHz. We fabricate CE HBT power cells and demonstrate state-of-the-art measured performance (36.2% PAE at 135 GHz at 4-dB compressed gain and 13.6 dBm). Using the ANN model trained at 130 GHz, transfer learning is accomplished for 135 GHz, 140 GHz, and prematched device datasets. The size of the ANN training sets is varied from 25% to 1% of the data collected, showing that our models are capable of predicting performance with an average rms error below 1.5% across sets. To our knowledge, this is the first demonstration of transfer learning within ANNs for transistor nonlinear modeling.