Development of wafer edge protection layer for advanced patterning process

Spin-on Metal Oxide Resist (MOR), Underlayer for EUV lithography and Spin-on Metal Hard Masks (MHM) are being studied for next generation semiconductor processes. Despite the immense potential of these new materials, the industry has paid enormous attention to avoid due to the general concern about trace metal impurities. Purposely introducing these metal-containing materials will inevitably raise alert, especially for track processes involving spin-coat layers that are currently handling primarily high purity organic materials. To address this new application challenge, or more specifically to protect the wafer edges from metal contamination during track processes, the authors have developed wafer Edge Protection Layer (EPL) material. EPL allows the wafer edge protection when the metal-containing coating is applied and the clean stripping with a proprietary solvent, EBR ACE to yield bevel and backside metal-free wafers that could be further processed as usual. This paper provides the key technical details of EPL material, process, and performance, with the aim to offer the industry a practical solution for safely introducing metal-containing spin-coat layers.