工程类
逻辑门
建筑
系统工程
计算机科学
计算机体系结构
电子工程
炸薯条
功率(物理)
泄漏(经济)
基础(证据)
电气工程
计算
纳米片
纳米电子学
集成电路设计
技术路线图
晶体管
纳米技术
逻辑综合
设计技术
芯片上的系统
新兴技术
CMOS芯片
作者
Wookhyun Kwon,Jaehong Lee,ByoungHak Hong,Myunggil Kang,Jinsu Jeong,Seunghwan Lee,H. Fukutome,Byung‐Soo Kim,Ken Rim,Jaihyuk Song
标识
DOI:10.1109/iedm50572.2025.11353479
摘要
The transition from FinFET to Gate-All-Around (GAA) FET architectures is a necessary step driven by the physical limitations of FinFETs at advanced technology nodes, and GAA FETs offer superior electrostatic control, enabling steeper sub-threshold slopes and reduced leakage currents. GAA FETs provide additional design freedoms, such as continuous nanosheet width patterning, allowing for broader coverage across the speed-power spectrum and enabling the implementation of design technology co-optimization techniques to maximize chip design utility. The GAA architecture serves as a foundational platform for future innovations, including Forksheet, 3D-stacked FET, and their integration with backside power delivery networks, paving the way for energy-efficient computation and sustainable AI development.
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