LPCVD vertical furnace optimization for undoped polysilicon film deposition

Thin film polysilicon deposition is a basic process in microelectronics, usually carried in hot wall horizontal tubular reactors. With increasing wafer dimension and tighter specifications, uniformity performance cannot be met without significant productivity losses. Recently, new vertical reactors were introduced also to overcome those issues. Here the optimization of one of these growth apparatus is presented, being it carried through a suitable combination of experimental data (growth rates, intrinsic stress) and a modeling analysis. The model consists of two mono-dimensional parts (for the inter-wafer region and for the annular region) and it is capable of quantitative estimates of growth rates, under quite varying process conditions.