Design and simulation of a novel multi-floating-gate synaptic nanowire transistor for neuromorphic computing

In this paper, we proposed a novel multi-floating-gate synaptic nanowire transistor which can emulate synapses behaviors such as long-term potentiation (LTP), long-term depression (LTD), integration signals from multiple pre- synapses and successive synaptic weight modulation, it can also realize high density interconnection in current CMOS IC technology to build complex neural network. Meanwhile, a novel scheme was also proposed to simulate amplitude-adjustable function by properly controlling the polarity-gates. Therefore, the multiple synaptic behaviors can be realized by the proposed new device, making it a competitive candidate for neuromorphic systems.