A study of hole mobility in the inversion layer of relaxed and strained SiGe PMOS devices

The hole mobility performance in strained SiGe PMOS devices is studied. Calculations have then been used for considering the impact of device structures including BULK, SOI, and DG, SiGe materials, alloy scattering and biaxial compressive strain owing to (001), (110), and (111) Si substrate orientation on the hole mobility performance to give an indication of the potential performance of this potential PMOS device.