信号完整性
电源完整性
印刷电路板
计算机科学
解耦(概率)
电子工程
德拉姆
堆栈(抽象数据类型)
母线
电气工程
工程类
计算机硬件
控制工程
程序设计语言
作者
Shinyoung Park,Vinod Arjun Huddar
标识
DOI:10.1109/edaps56906.2022.9995596
摘要
In today’s high speed design space, speed is the main factor determining the performance of the product. Dual In-line memory modules (DIMM) designs for DDR5 are packed with many high-speed DRAMs with signal speeds high enough that stack-up of the printed circuit board (PCB) play a critical role in the overall DIMM performance. At speeds of 6400 Mbps, power integrity becomes as important as signal integrity. On a first order approximation, power integrity basically involves PCB stack-up and decoupling capacitors design. This paper covers significance of power distribution network (PDN) symmetry in a symmetric stack-up for two-sided component mounted PCBs like DIMM modules running at multi-Gbps speeds.
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