低压差调节器
跌落电压
瞬态响应
超调(微波通信)
电压
控制理论(社会学)
瞬态(计算机编程)
电压调节器
电源抑制比
线性调节器
计算机科学
材料科学
调节器
工程类
开关电源
电气工程
化学
控制(管理)
人工智能
操作系统
生物化学
基因
作者
Xiaoke Wei,Weifeng Liu,Zejun Zhang,Zhibao Yu
标识
DOI:10.1109/icet58434.2023.10212011
摘要
A flipped voltage follower (FVF) based low-dropout (LDO) regulator with a wide input voltage range, which could be used in power-driving chips, is proposed and simulated in a standard 0.18µm BCD process in this paper. The proposed LDO could achieve a fast transient response and have a wide input voltage range using the dual loop structure. The simulation results show that the proposed linear regulator could be regulated to 5.0V in a wide input range of 8-45V, and PSRR is −88.74dB when working at low-frequency. Moreover, PSRR at 1MHz is still −70.24dB. The output changes by 1.47mV when input voltage changes from 8V to 45V. When input voltage is 24V and load current varies from 1µA to 50mA, the output changes by 9.06µV at TT corner. For large load transient of 1µA to 50mA and back to 1µA, the simulated overshoot and undershoot is 68.43mV and 75.7mV, with recovery time being 26ns and 102ns at TT process corner.
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