Low breakdown voltage and CMOS compatible avalanche photodiode based on SOI substrate

In this work, we present a novel, to the best of our knowledge, lateral avalanche photodiode (APD) with low breakdown voltage and high bandwidth which has the potential to serve as a core device in future large-scale advanced optoelectronic hybrid chips. By taking advantage of a silicon-on-insulator (SOI) substrate combined with a separation absorption multiplier (SAM) structure, the demonstrated APDs exhibit a high gain of 148. Furthermore, the minimum breakdown voltage of the measured device is 6.1 V, which represents the lowest breakdown voltage for Si-APD, making it compatible with the existing CMOS technology for low voltage operation. Benefiting from an ultra-thin top silicon and lateral SAM structure, the problem of edge breakdown has been completely solved. Additionally, a set of device arrays with absorption and avalanche regions of different sizes is also manufactured and compared. Our findings indicate that the proposed APD has fascinating application prospects in the CMOS process-based LIDAR chips.