Exploring Compute-in-Memory Architecture with Various Peripheral Circuits and Neural Networks

Compute-in-memory (CIM) stores weights in nonvolatile memory to perform vector–matrix multiplications (VMMs) via Ohm’s and Kirchhoff’s laws, reducing energy and latency. We present a comprehensive and comparative study of CIM architectures employing different peripheral circuits and neural network schemes. Fixing the nonvolatile memory array (AND-type flash) and technology node (45 nm), we evaluate four CIM architectures on a 9-layer conventional DNN (CIFAR-10) and a spiking DNN. By replacing ADCs with PWMs in only the first two layers, we reduce dynamic energy by 18.5 % and area by 19.8 % with no throughput loss. Substituting LIF neurons yields a 14.9 % energy saving at the cost of a small area overhead. ADC-based baseline achieves 87.05 % accuracy on the DNN and 81.85 % on the spiking DNN, while hybrid schemes reduce quantization loss.