3.1 A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion

Giga-sample ADCs targeting high performance communication applications such as direct-RF sampling all rely on some form of residue amplification to minimize the number of interleaved channels and meet demanding specifications. Despite architectural efforts to reduce the total number of amplifiers in the system, the challenges associated with designing them for high bandwidth and linearity has limited reported power efficiencies [1]. In this work, we show that ring amplification [2] can overcome this longstanding bottleneck. In an architecture using 36 ringamps, the 3.2GS/s ADC consuming 61.3mW has a Nyquist SNDR of 61.7dB, SFDR of 73.3dB, Walden FoM of 19.2fJ/conv-step, and Schreier FoM of 165.9dB. Furthermore, we demonstrate a general technique whereby the signal-to-distortion ratio (SDR) of any amplifier in the system can be independently monitored in the background with an analog hardware overhead of only one comparator.