射频前端
NMOS逻辑
巴伦
CMOS芯片
电气工程
无线电接收机设计
超外差接收机
噪声系数
发射机
PMOS逻辑
收发机
低噪声放大器
晶体管
无线电频率
电子工程
模拟前端
工程类
放大器
频道(广播)
电压
天线(收音机)
作者
Munir M. El‐Desouki,Syed Manzoor Qasim,Mohammed S. BenSaleh,M. Jamal Deen
出处
期刊:Sensors
[Multidisciplinary Digital Publishing Institute]
日期:2015-05-07
卷期号:15 (5): 10791-10805
被引量:11
摘要
The demand for radio frequency (RF) transceivers operating at 2.4 GHz band has attracted considerable research interest due to the advancement in short range wireless technologies. The performance of RF transceivers depends heavily on the transmitter and receiver front-ends. The receiver front-end is comprised of a low-noise amplifier (LNA) and a downconversion mixer. There are very few designs that focus on connecting the single-ended output LNA to a double-balanced mixer without the use of on-chip transformer, also known as a balun. The objective of designing such a receiver front-end is to achieve high integration and low power consumption. To meet these requirements, we present the design of fully-integrated 2.4 GHz receiver front-end, consisting of a narrow-band LNA and a double balanced mixer without using a balun. Here, the single-ended RF output signal of the LNA is translated into differential signal using an NMOS-PMOS (n-channel metal-oxide-semiconductor, p-channel metal-oxide-semiconductor) transistor differential pair instead of the conventional NMOS-NMOS transistor configuration, for the RF amplification stage of the double-balanced mixer. The proposed receiver circuit fabricated using TSMC 0.18 µm CMOS technology operates at 2.4 GHz and produces an output signal at 300 MHz. The fabricated receiver achieves a gain of 16.3 dB and consumes only 6.74 mW operating at 1.5 V, while utilizing 2.08 mm2 of chip area. Measurement results demonstrate the effectiveness and suitability of the proposed receiver for short-range wireless applications, such as in wireless sensor network (WSN).
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