Lithography as a critical step for low-k dual damascene: from 248 nm to 193 nm

Optical lithography is continuously pushed to its limits for volume manufacturing of integrated circuits. With the implementation of low-k dielectrics in the back-end-of-line processes, the optical properties of the dielectric stack have drastically changed. Also the transition from the conventional AlCu dry-etch scheme to several potential damascene integration schemes has significant impact on the lithography process and should be taken into account. Usually front-end-of-line development is considered as the driving force for lithography. However back-end lithography has become as challenging recently. In this paper, the various issues for back-end damascene lithography processes for the 0.13 um technology node will be outlined. The IMEC strategy for back-end-of-line lithography solutions will be outlined, for both 248 nm and 193 nm lithography.