Design of a mixed 3.3 V and 5 V PCI I/O buffer

Design of a digital 3.3 V powered input/output buffer is presented in this paper. The new buffer, a true CMOS buffer, may work as a 3.3 V input buffer, 3.3 V output buffer, 5 V input buffer as well as 5 V output buffer in the PCI (Peripheral Component Interconnect) signaling environment. The concept of this design may also be used for other I/O and any circuit requiring mixing power and signaling environment.