集成电路
图像分辨率
表征(材料科学)
材料科学
光学
计算机科学
纳米技术
物理
光电子学
作者
Nathan Nakamura,Paul Szypryt,Joseph W. Fowler,Zachary H. Levine,Daniel S. Swetz
标识
DOI:10.1109/paine58317.2023.10318004
摘要
Accurate characterization of subsurface features in integrated circuits (ICs) is essential for defect detection, quality assurance, and supply chain security. The interiors of ICs are challenging to probe post-manufacturing due to the presence of many close-packed and nanoscale subsurface features of multiple material compositions, often spread over square millimeters of chip area. X-ray computed tomography (CT) has historically been a powerful tool for 3-dimensional imaging of buried features, but modern instruments are unable to achieve the spatial resolution, elemental sensitivity, or scan areas required to fully characterize ICs. Advanced imaging of ICs is possible at synchrotron beam-lines, but such methods are not easily accessible and could not reside directly at a semiconductor foundry or security agency. A need exists for compact, laboratory-scale instrumentation that can image nanoscale features in 3-dimensions over large areas, with sensitivity to feature size, shape, and composition. We describe an approach to x-ray CT which merges a focused electron beam with high magnification system geometry and a combination of high efficiency and high resolving power x-ray detection. This achieves nanoscale, element-sensitive imaging of ICs in a compact instrument footprint. A proof-of-concept has been demonstrated and current imaging capabilities are discussed. The path forward is described, with opportunity for advances in spatial resolution, imaging speed, and spectral imaging capabilities beyond conventional laboratory CT instruments.
科研通智能强力驱动
Strongly Powered by AbleSci AI