材料科学
薄膜晶体管
铜
晶体管
氧化物
直线(几何图形)
光电子学
电流(流体)
过程(计算)
电气工程
纳米技术
冶金
计算机科学
工程类
图层(电子)
电压
数学
几何学
操作系统
作者
Chi-Yuan Kuo,Wei‐Chen Lin,Tsung-Tien Lo,Ching-Hsuan Shen,Mingyu Shen,Chia-Chan Lee,Chi-Ping Lin,Yuang-Ming Lin,Haw-Tyng Huang,Po‐Chun Yeh,Hsin‐Chu Chen,Chih‐I Wu
出处
期刊:Journal of vacuum science & technology
[American Institute of Physics]
日期:2024-08-30
卷期号:42 (5)
被引量:1
摘要
The objective of this study is to develop an efficient process to synthesize wafer scale p-type cuprous oxide (Cu2O) with the back-end-of-line (BEOL) compatible process (<400 °C). Metallic copper is deposited on SiO2/Si substrates followed by rapid thermal oxidation to oxidize it into large-area, uniform Cu2O. Bottom-gate Cu2O thin-film transistors (TFTs) were fabricated as gate dielectric on 100 nm thermal oxide. The results of the ID-VG curve demonstrate that we have successfully fabricated BEOL-compatible p-type Cu2O TFTs. The drain-off current can be achieved to 0.1 pA, with the highest on/off ratio reaching up to 6 orders. Significantly, the TFT with an on/off ratio of 106 is sufficient to meet the requirements for digital circuit applications, including logic circuits, and the BEOL-compatible process (<400 °C) can fulfill the demands of monolithic 3D integrated circuits, expanding the scope of functional integration applications. Additionally, positive bias stress reliability testing indicated a high-quality passivation layer. These findings suggest that material improvements have significantly enhanced the performance of Cu2O TFTs.
科研通智能强力驱动
Strongly Powered by AbleSci AI