Theoretical Study of Miniaturization of a Silicon Vapor Chamber for Compact Microelectronics

Interest in silicon vapor chambers (SVCs) has increased in recent years as they have been identified as efficient cooling systems for microelectronics. They present the advantage of higher thermal conductivity compared to conventional heat spreaders, but the ability to miniaturise and integrate them remains limited. This work aims to investigate the potential miniaturization of these devices for integration on the backside of mobile device chips, located as close as possible to hotspots. Analytical models are used to predict the operating limits of water filled micropillar-based SVCs. The results show that such 1 × 1 cm ² SVCs thinner than 200 μm thick can operate below 10 W and the corresponding design is presented. Optimum micropillars diameter / spacing ratio of 2 and wick thickness / internal height between 0.25 and 0.31 have been identified. A compatible layout of internal support pillars is also studied in order to insure sufficient mechanical resistance in the case of thin walls.