相控阵
中间层
比克莫斯
天线(收音机)
雷达
材料科学
成套系统
波束赋形
有源电子扫描阵列
印刷电路板
电子工程
电气工程
工程类
炸薯条
光电子学
雷达工程细节
晶体管
雷达成像
电信
蚀刻(微加工)
复合材料
电压
图层(电子)
作者
Dean Malta,Erik Vick,Matthew Lueck,Alan Huffman,Sharon Woodruff,Parrish Ralston,Jeffrey Hartman,N. Bushyager,Günter Ebner,Stuart Quade,Adam Young,Christopher Hillman,Jonathan Hacker
标识
DOI:10.1109/ectc.2016.103
摘要
We report a TSV-last, heterogeneous 3D integration process for millimeter wave solid state tiles for use in the demonstration of a W-band active electronically scanned array (AESA) radar system. Each phased array tile consists of a high speed SiGe BiCMOS beamformer chip, vertically integrated with an advanced, multi-metallization level glass substrate which includes an RF interposer and a patch antenna array. This paper will briefly describe the SiGe and glass circuit layers, along with the main components of the 3D integration processing and assembly. Electrical testing of the SiGe and glass chips was conducted at various points during the integration processing, including DC and RF measurements after the two chips were bonded together. Additionally, DC testing of TSV chains was completed along with thermal cycling. The results of this work indicated a successful initial prototype demonstration of 3D heterogeneous integrated phased array tiles, which can be used for a multi-tile subarray assembly and subsequent sensor system demonstration.
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