德拉姆
电子线路
计算机科学
电气工程
工程类
计算机硬件
出处
期刊:
日期:2025-02-16
卷期号:: 1-1
被引量:1
标识
DOI:10.1109/isscc49661.2025.11076120
摘要
DRAM has evolved in terms of speed and capacity, with different characteristics to adjust various applications. DDR for servers or PCs, LPDDR for mobile applications, GDDR for graphics cards, and HBM for high-performance GPUs are optimized for their own applications. In particular, each DRAM I/O is introducing various technologies to double the pin speed when switching generations based on different characteristics, from signaling to equalization. We will introduce the specific circuit techniques to meet the requirements of DDR5, LPDDR5, HBM3E, and GDDR7 interfaces, which are currently undergoing a generation transition, and the basics of BER (bit-error rate) target and I/O error check in each system.
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