Investigation of interconnect parameters for high speed microelectronics devices applications

The present paper reports the optimization and analysis of the interconnect parameters such as ground and coupling capacitance which play very important roll in the design and development of future microelectronics devices. Here, we have optimized ground capacitance along with the variation in dielectric thickness and interwire spacing respectively. It has been observed that ground capacitance increases with increase in interwire spacing. It is also find out that the ground capacitance decreases with simultaneously increase in dielectric thickness.