A 3–5 V to Sub-1 V DLDO-SC-Sigma Converter With Auxiliary Loop for Efficiency Improvement in High-Density Power Delivery

This article presents a switched-capacitor (SC) sigma converter with a digital low dropout (DLDO) regulator and an auxiliary loop for efficiency improvement for high-density power delivery applications. The proposed converter has the input-series and output-parallel feature, and it consists of a hybrid SC converter on the high side for high density and high efficiency, and a DLDO on the low side for fast voltage regulation. By combining two sides of converters, this work takes advantage of both high power density and fast response under 5 V to sub-1 V step-down conversion. To further improve overall efficiency, an auxiliary control loop is proposed to guarantee a minimized dropout voltage for the DLDO across a wide range of input and output voltages. The DLDO-SC-Sigma converter was fabricated in a 40 nm CMOS process. It can deliver 5 A maximum current from 3 to 5 V input to sub-1 V output and achieves a peak efficiency of 92%. A 1.6 μs response time and 36 mV voltage droop are achieved with a 2 A load transient. The converter achieves a system power density of 101.3 W/cm³.