Trade-Off in Key Electrical Parameters of MoS2 Field-Effect Transistors with the Number of Layers

The electrical properties of molybdenum disulfide (MoS 2 ) field-effect transistors (FETs) vary significantly with layer thickness; yet, most studies have focused primarily on mobility, and the variations in other electrical parameters have often been overlooked. Here, we systemically evaluate the variation in threshold voltage ( V th ), on current ( I on ), off current ( I off ), I on / I off ratio, mobility, subthreshold swing (SS), and pinch-off voltage ( V p ) across a range of layer thicknesses from a few layers to over 100 layers. The results indicate that as the number of MoS 2 layers increases from a few layers to over 100 layers, the mobility improves and eventually saturates. However, this enhancement comes with the following trade-offs, which are increased I off, decreased I on / I off ratio, negative shift in V th, deteriorating SS, and rising V p . FET characteristics from 5 layers to 128 layers were compared, and it is observed that the mobility increases from 26 cm 2 /V·s to 81 cm 2 /V·s, I on increases from 7.4 × 10 –6 A/μm to 2.0 × 10 –5 A/μm, I off increases from 1.5 × 10 –12 A/μm to 7.2 × 10 –8 A/μm, the I on / I off ratio decreases from 4.7 × 10 6 to 2.8 × 10 2, V th changes from ∼−9 V to −29 V, SS increases from 0.65 V/decade to 2.34 V/decade, and V p increases from 2.9 V to beyond 10 V. For practical applications, the overall performance of an electronic device must be assessed by taking into consideration all these key electrical parameters. These observations of the trade-off between various parameter sets constrain the upper limit of the thickness of 2D materials that can be used for optimum device performance. Based on these trends, MoS 2 channels below ∼50 layers may provide an optimal balance of mobility, gate control, and switching efficiency, making them better suited for logic circuit applications. For applications prioritizing high current drive, such as in RF/amplifier designs, thicker channels (50–100 layers) may be appropriate, depending on the specific design requirement. These findings are essential for next-generation 2D-based nanoelectronics by guiding the selection of the optimal thickness range of multilayer 2D materials for applications where the relative significance of different electrical parameters varies based on the intended purpose.