CMOS芯片
带隙基准
电压
电子线路
材料科学
阈值电压
晶体管
过驱动电压
跌落电压
二极管
电气工程
光电子学
辐射硬化
电压基准
吸收剂量
泄漏(经济)
辐射
电子工程
工程类
物理
探测器
光学
经济
宏观经济学
作者
Dalton Martini Colombo,Anubis Rosseto,Gilson Wirth,Sérgio Bampi,Odair Lélis Gonçalez
标识
DOI:10.1109/tdmr.2017.2787906
摘要
This paper investigates the impact of total ionizing dose (TID) effects on the performance of CMOS voltage reference circuits. Four circuits were designed using a commercial 130-nm CMOS process and without any radiation-hardening technique. Two of the designed circuits generate the output voltage proportional to the bandgap voltage, while the other two generate the output voltage proportional to the MOS threshold voltage. The measured output voltage variation caused by TID was from 1% to 15% for a total dose of up to 500 krad, depending on the circuit topology. The leakage currents induced by radiation in MOS transistors and diodes were the main cause of output voltage variation.
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