球栅阵列
倒装芯片
包对包
微电子
芯片级封装
有限元法
可靠性(半导体)
互连
集成电路封装
四平无引线包
电子工程
模具(集成电路)
机械工程
电子包装
电介质
材料科学
炸薯条
可靠性工程
工程类
焊接
功率(物理)
电气工程
结构工程
复合材料
电信
图层(电子)
晶片切割
量子力学
物理
胶粘剂
作者
Kuo‐Chin Chang,Yuan Li,Chung-Yi Lin,Mirng-Ji Lii
摘要
Flip Chip Ball Grid Array (FCBGA) package has been introduced in recent years to address the needs in the microelectronic packaging industry for increasing performance and I/O density, which offers a cost effective solution with smaller form factor. Furthermore, Cu interconnects with low-k dielectric material were also introduced to reduce power consumption and further enhance device performance. Due to the nature of low-k dielectric material characteristics, it is more sensitive while a package with low-k material subjected to thermal loading stress. This work conducted analyses on various FCBGA package design parameters using 3-D finite element method (FEM) and provided design suggestions while selecting the packaging materials. To demonstrate the appropriateness of the finite element models, the modeling results were also calibrated with experimental package warpage measurements. Based on modeling data it was revealed that certain set of packaging materials would further enhance overall package reliability performance. Basic package design guidelines will be presented upon the findings of this study, which products designers could benefit from the superior power consumption and devices performance offered from the integration of Cu interconnect and low-k dielectric.
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